SIFT影像辨識演算法及其在FPGA之實現

Abstract

本文提出將SIFT影像辨識演算法實現於FPGA上，以解決影像辨識需要大量運算時間，而使得系統無法即時運算之問題。為了大幅減少邏輯單元之需求以及提升系統頻率，我們依照硬體適合之架構以及平行處理的優勢，針對SIFT演算法進行改良，如使用軟體預先計算高斯模板、使用數值方式避免反矩陣使用除法器以及將影像金字塔使用平行處理之架構實現等。除此之外，我們也使用CORDIC演算法進行三角函數、平方相加開根號以及反三角函數等實現，還有使用最佳化演算法找出高斯影像所需之最佳參數，並在硬體中進行連續高斯影像金字塔之近似，最後使用硬體實現影像梯度直方圖統計，如此一來就能於硬體中進行特徵主方向偵測以及特徵點描述之功能，而論文中會清楚介紹上述所提到之實現方法。而為了降低開發之困難性，首先以軟硬協同設計之架構對部分模組進行加速設計，完成後，再將整個系統以全硬體方式進行實現，值得一提的是，整個系統電路皆是由管線架構設計而成，因此可以大幅提升運算效率，進而達到即時運算之目標，從實驗結果證實，電路模組運算速度相較於軟體有大幅提升，而硬體實現結果相較於軟體之誤差也保有相當之精確度。

To solve the problem of image recognition, which requires plenty of computation time by software, we present a hardware implementation approach of SIFT recognition algorithm to achieve the goal of real time execution, through the use of offline calculation of the Gaussian kernel by software, a mathematical derivation to calculate inverse matrix without using any divisors, realization of image pyramid in parallel, etc. As a result, the system performs well in reducing a number of logic units required and the system frequency is significantly increased. In addition, the CORDIC algorithm is employed to implement not only mathematical functions such as trigonometric functions and square root computation, but also an image gradient histogram successfully by hardware. Consequently, the dominant orientation detection and key point descriptors can be implemented by image gradient histogram. To develop an applicable system, the first step is to apply the software and hardware co-design approach to accelerate functional modules and subsequenty implement the entire system in pure hardware. Besides, the structure of all modules is based on pipeline design. Experimental results demonstrated that the proposed approach has significantly reduced computation time required and efficiently increased maximum system frequency. Most importantly, the execution speed has achieved real time computation for practical applications.