毫米波單邊帶升頻器與寬頻調變器設計

Abstract

隨著通訊世代的演進，第五代行動通訊為了避免壅塞的低頻頻段且希望有較大頻寬將資料傳輸率提升，故已發展至毫米波頻段，其中要將基頻訊號升頻至毫米波頻段，必須藉由射頻收發機中的調變器與混頻器。由於互補式金氧半導體製程(CMOS)的成熟發展，其有低成本、低功耗與高整合度的優點，並能將大部分的射頻電路整合在一起，故本論文使用TSMC 180-nm CMOS RF與TSMC 90-nm CMOS RF製程來實現單邊帶升頻器與寬頻調變器。第一個電路為單邊帶升頻器，透過供給兩顆混頻器正交訊號，產生相位差180˚的輸出訊號，在輸出端便可消除其中一邊頻帶的訊號，此外為了彌補被動式混頻器之損耗，在RF端後級加上一緩衝放大器，採用兩級疊接組態串連的架構，提供大約18.14 dB的高增益與4.54 dB的雜訊指數。整體單邊帶升頻器模擬與量測之特性趨勢相近，在LO驅動功率3 dBm且偏壓0.6 V下，轉換增益為-7.35 dB ± 0.5 dB，頻寬約為26~28 GHz，鏡像拒斥比在-40 dB下的頻寬約為22~29 GHz，整體晶片面積約為1125μm × 730μm。第二個電路為寬頻調變器，透過I/Q調變訊號的方式饋入兩顆混頻器來消除鏡像訊號，並利用巴倫器、二階耦合器與匹配元件等來達成寬頻的鏡像拒斥比。在電晶體偏壓為0.35 V、IF頻率為0.1 GHz、RF頻率為28 GHz、LO驅動功率為10 dBm時，實現轉換增益為-9.31 ± 0.5 dB時，有約27~46 GHz的頻寬，且-40 dB下的鏡像抑制頻寬約為28~42 GHz，擁有寬頻的鏡像抑制效果，整體晶片面積約952μm × 682μm。With the evolution of the communication generation, the fifth-generation mobile communication has developed to the millimeter wave frequency band in order to avoid the congested low-frequency band and hope to have a larger bandwidth to increase the transmission data rate. The frequency band must pass through the modulator and mixer in the RF transceiver. Due to the mature development of complementary metal oxide semiconductor process (CMOS), it has the advantages of low cost , low power consumption and high integration to integrate most of the radio frequency circuits together, so the Single-Sideband upconverter and broadband modulator are implemented with TSMC 180-nm CMOS RF and TSMC 90-nm CMOS RF process.The first circuit is a SSB up-converter. By applying quadrature signals into two mixers, an output signal with a phase difference of 180˚ is generated, and the signal on one side of the frequency band can be eliminated at the output. In addition, in order to compensate for passive mixing loss, a buffer amplifier is added at the RF, and a two-stage cascade configuration is used to furnish a high gain of about 18.14 dB and a noise index of 4.54 dB. The overall SSB up-converter has a similar characteristic trend between simulation and measurement. When the LO driving power is 3 dBm and the bias voltage is 0.6 V, the conversion gain is -7.35 dB ± 0.5 dB from 26 to 28 GHz. The image suppression bandwidth under -40 dB is about 22 to 29 GHz. The overall chip size is about 1125 μm × 730 μm.The second circuit is a broadband modulator, which feeds the I/Q modulation signal into two mixers to eliminate image signals, and uses baluns, second-order couplers and matching components to achieve broadband image rejection ratio. When the bias voltage of the transistor is 0.35 V, the IF frequency is 0.1 GHz, the RF frequency is 28 GHz, and the LO driving power is 10 dBm, the conversion gain is -9.31 ± 0.5 dB from 27 to 46 GHz. The image suppression bandwidth under -40 dB is about 28 to 42 GHz, which has a broadband image suppression effect. The overall chip size is about 952 μm × 682 μm.