含浮點運算類似ARM微控制器之實驗平台設計
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2006
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隨著資訊科技進步，在嵌入式系統（Embedded System）領域中以ARM作微控制器(microcontroller)之系統在實用（PDA、Smart Phone）與教學上應用頗為廣泛，市面上討論ARM各系列CPU的應用（包括與周邊軟硬體介面之論述與書籍繁多，但討論ARM CPU內部結構與硬體設計著述者屬屈指可數，本論文設計一個類似ARM架構的CPU，並將電路下載至一個含80萬個邏輯閘數
（Gate Count）的FPGA晶片上配合相關I/O實驗版作驗證，期能對以ARM CPU為主之嵌入式系統教學，能有從內至外有較充分的整體瞭解。
本論文使用硬體描述語言VHDL，設計一個32位元類似ARM微處理器（含浮點輔助運算器），實作指令共33個指令，首先參考ARM 指令集編碼與設定格式以及ARM微處理器的運作流程，設計出ARM微處理器初步的架構，先設計基本的指令（如資料處理指令），經過指令模擬(Simulation)測試成功後，再加入其他指令，由簡入繁，逐步完成，之後將設計模擬完成的ARM微處理器電路下載燒錄於Xilinx Vertex系列晶片中，並加入相關週邊應用介面I/O電路設計，與週邊顯示電路實體連接，完成FPGA(Field Programmable Gate Array)實驗平台設計架構。最後，利用設計完成的指令集撰寫相關應用程式，來驗證整個ARM微處理器的運作。
As technology developed, the ARM CPU became the mainstream in the embedded system. There are many books and works about the application of every CPU series in ARM (including PDA, Smart Phone) and hardware software interface, but there are a few works talking about the CPU inner structure and hardware design. This thesis designed a CPU which resembles the ARM structure and downloaded the circuit into a FPGA chip which contains 800 thousand gate counts. Also, the thesis will demonstrate the I/O experimental type and hope to wholly realize the embedded system instruction based mainly on ARM CPU. This thesis used the VHDL, a hardware descriptor language, to design a 32 byte resembling ARM microprocessor (including floating point coprocessor) and contained 33 working commands. At the first step, this thesis referred to the ARM instruction set decoder, defined format and the operating process of ARM microprocessor. At this stage, I designed the initial structure of the ARM microprocessor and essential commands (ex. Data operation command). After the command simulation test, I added other commands to finish the design. At the second step, the ARM microprocessor which passed the command simulation test was burned on the Xilinx Vertex chip and was added the other directed I/O circuit design. The FPGA (Field Programmable Gate Array) experimental platform design was finished after the ARM microprocessor combined the Peripheral display circuit. Finally, I wrote the correlative application programs by using the instruction set to verify the whole ARM microprocessor.
As technology developed, the ARM CPU became the mainstream in the embedded system. There are many books and works about the application of every CPU series in ARM (including PDA, Smart Phone) and hardware software interface, but there are a few works talking about the CPU inner structure and hardware design. This thesis designed a CPU which resembles the ARM structure and downloaded the circuit into a FPGA chip which contains 800 thousand gate counts. Also, the thesis will demonstrate the I/O experimental type and hope to wholly realize the embedded system instruction based mainly on ARM CPU. This thesis used the VHDL, a hardware descriptor language, to design a 32 byte resembling ARM microprocessor (including floating point coprocessor) and contained 33 working commands. At the first step, this thesis referred to the ARM instruction set decoder, defined format and the operating process of ARM microprocessor. At this stage, I designed the initial structure of the ARM microprocessor and essential commands (ex. Data operation command). After the command simulation test, I added other commands to finish the design. At the second step, the ARM microprocessor which passed the command simulation test was burned on the Xilinx Vertex chip and was added the other directed I/O circuit design. The FPGA (Field Programmable Gate Array) experimental platform design was finished after the ARM microprocessor combined the Peripheral display circuit. Finally, I wrote the correlative application programs by using the instruction set to verify the whole ARM microprocessor.
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ARM微處理器, 嵌入式系統, FPGA, VHDL