應用於28 GHz相移器與可變增益放大器設計

Abstract

由於行動通訊系統的容量不敷使用，目前的研究逐漸轉向毫米波發展，其中包括了更高速的傳輸、更豐富的頻寬、低延遲等優點。在我國的首波5G釋照頻段中，分別有3.5 GHz、1800 MHz和28 GHz，較高的工作頻率可提供小型化的相位陣列系統，因此28 GHz的頻段在5G無線通訊的應用中是具有競爭力的。 本論文設計三個應用於28 GHz的電路，第一個電路為28 GHz五位元相移器，由180°之相位可反向衰減器(PIVA)、90°反射式相移器(RTPS)和三個開關式相移器(STPS)組成，整體晶片佈局面積(含PAD)為0.94 mm × 0.57 mm，操作頻率為27 GHz至29 GHz。量測結果顯示，在中心頻率28 GHz時，整體輸入輸出反射損耗分別小於 -14.1 dB及 -5.1 dB，均方根振幅誤差和相位誤差分別為0.5 dB和2.72°，此相移器屬於被動電路。 與第一個設計相比，第二個電路改善了設計的頻率響應，整體晶片佈局面積(含PAD)為0.94 mm × 0.57 mm，操作頻率為27.5 GHz至31.5 GHz，在中心頻率29.5 GHz時，模擬之輸入輸出反射損耗分別小於 -15 dB及 -12 dB，均方根振幅誤差和相位誤差分別為0.1 dB和0.2°。同樣地，此相移器也屬於被動電路。 第三個電路為28 GHz可變增益放大器，利用兩級電流控制(current steering)機制降低相位變化，同時維持一定的增益變化範圍(gain control range)，整體晶片佈局面積(含PAD)為0.65 mm x 0.58 mm。量測結果顯示，在28 GHz時小訊號增益範圍為2.8 dB至10.8 dB，整體輸入輸出反射損耗分別小於 -10.5 dB和 -13.9 dB，相位差為7.5º，OP1dB小於 -1.2 dBm，直流功耗為35.3 mW。

Due to the insufficient capacity of mobile communication systems, current research has gradually turned to millimeter wave development, which includes the advantages of higher speed, wider bandwidth, and low latency. At the first release of 5G licenses in Taiwan, there are frequency band of 3.5 GHz, 1800 MHz and 28 GHz, respectively. The higher operating frequency can provide a miniaturized phased-array system. Therefore, the frequency band of 28 GHz is competitive in the application of fifth generation wireless communication. There are three circuits applied in 28 GHz designed in this thesis. The first circuit is a 28 GHz five-bit phase shifter composed of a 180º phase-invertible variable attenuator, a 90º reflection type phase shifter and three switch type phase shifters. The overall chip area is 0.94 mm x 0.57 mm including pads. Operating frequency is between 27 GHz and 29 GHz. The measured performance at 28 GHz indicates the input and output return loss which are better than -14.1 dB and -5.1 dB, respectively. The root mean square amplitude error and phase error are 0.5 dB and 2.72 degrees, respectively. This phase shifter is a fully passive design. The second circuit improved the frequency response to our design target as compared to the first design. The overall chip area is 0.94 mm x 0.57 mm including pads. Operating frequency is between 27.5 GHz and 31.5 GHz. The simulated performance at 29.5 GHz indicates the input and output return loss are better than -15 dB and -12 dB, respectively. The root mean square amplitude error and phase error are 0.1 dB and 0.2 degrees, respectively. Identically, phase shifter is a passive design as well. The third circuit is a 28 GHz variable gain amplifier utilizing two stage current steering mechanisms. The overall chip area is 0.65 mm x 0.58 mm including pads. The measured performance at 28 GHz indicates that the small signal gain ranges from 2.8 dB to 10.8 dB. The overall input and output return loss are better than -10.5 dB and -13.9 dB, respectively. The phase error is 7.5 degrees. The OP1dB is below -1.2 dBm and its DC consumption is 35.3 mW.