Please use this identifier to cite or link to this item: http://rportal.lib.ntnu.edu.tw:80/handle/20.500.12235/106891
Title: 應用於棘波分類之硬體架構實現
Hardware Implementation for Spike Sorting
Authors: 黃文吉
李偉豪
Keywords: 可程式化系統晶片
棘波分類
主成分分析
GHA
FCM
FPGA
system on programmable chip
spike sorting
principal component analysis
generalized Hebbian algorithm
fuzzy c-means algorithm
FPGA
Issue Date: 2012
Abstract: 本論文針對快速棘波分類設計了一套專用的架構,並於硬體中實現此架構。本論文採用Generalized Hebbian Algorithm (GHA) 來擷取棘波的特徵值,搭配Fuzzy C-Means (FCM) 演算法將擷取到的棘波特徵值進行分類。GHA演算法可高速計算主成分特徵值供後續分群演算法進行運算,同時利用FCM演算法對於初始質心選取好壞不敏感的特性可獲得較佳的分類結果。為了減少硬體資源的消耗,GHA架構中在計算調整不同組權重值時皆共享相同一塊計算電路,而FCM採用逐步增量計算權重係數與質量中心點,這可以避免原本需要大量儲存空間儲存權重係數矩陣所造成的空間消耗。因此,本論文所提出的架構同時擁有低area cost與高輸出產量的優點。為了驗證本論文所提出的架構有效性,我們於現場可程式邏輯閘陣列 (Field Programmable Gate Array , FPGA) 中實作出本架構,並於嵌入式System-On-Programmable-Chip (SOPC) 平台中進行實際效能量測。實驗結果證明針對棘波分類本論文所提出的架構同時具有低判斷錯誤率、低area cost與高速計算的優點。
This paper presents a novel architecture for fast spike sorting. The architecture is based on Generalized Hebbian Algorithm (GHA) and Fuzzy C-Means (FCM) algorithm. The GHA are used for feature extraction and the FCM are used for clustering. To show the effectiveness of the circuit, the proposed architecture is physically implemented by Field Programmable Gate Array (FPGA). It is embedded in a System-On-Programmable-Chip (SOPC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for at-taining low classification error rate, low area costs and high speed computation.
URI: http://etds.lib.ntnu.edu.tw/cgi-bin/gs32/gsweb.cgi?o=dstdcdr&s=%22http://etds.lib.ntnu.edu.tw/cgi-bin/gs32/gsweb.cgi?o=dstdcdr&s=id=%22GN0699470125%22.&%22.id.&
http://rportal.lib.ntnu.edu.tw:80/handle/20.500.12235/106891
Other Identifiers: GN0699470125
Appears in Collections:學位論文

Files in This Item:
File SizeFormat 
n069947012501.pdf1.09 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.