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理學院
資訊工程學系
學位論文
學位論文
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http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/73912
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search.filters.author.Chen-Huan-Yuan
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search.filters.author.陳煥元
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search.filters.subject.FPGA
1
search.filters.subject.相位展開法則
1
search.filters.subject.系統晶片設計
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search.filters.subject.高速運算
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數位全像顯微鏡之高速相位展開法則電路於FPGA上之實現
(
2014
)
陳煥元
;
Chen-Huan-Yuan
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本論文主要提出一硬體架構實現高速相位展開法則,透過本論文硬體架構可將不連續相位圖還原出與實際物體面貌相符合之連續相位圖。本論文採用定點數運算,令系統架構之資源消耗下降。同時配合廣域型相位展開法則及蛇狀路徑Buffer,使系統架構通則化後,可依照需要處理之不連續相位圖,調整系統架構及延伸法則,並透過高速運算有效降低遞回運算所需時間。 最後將此電路實現於FPGA開發平台進行實際量測硬體資源消耗、運算時間及功率消耗,透過硬體運算結果與軟體運算結果相互驗證後,確認還原結果正確。 依據實驗結果,本論文之系統架構具有資源消耗低、高速運算、複雜性低及系統延伸便利等多項優勢,對於現今需即時運算的嵌入式數位全像系統,本論文所提出之系統架構具有更強競爭力。
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