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理學院
資訊工程學系
學位論文
學位論文
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http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/73912
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search.filters.author.黃維熙
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search.filters.author.Huang, Wei-Hsi
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search.filters.subject.Chipyard
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search.filters.subject.FPGA
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search.filters.subject.none
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search.filters.subject.SoC
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2022
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以Chipyard為基礎的SoC設計平台FPGA實現之研究
(
2022
)
黃維熙
;
Huang, Wei-Hsi
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近年來在軟體上的AI加速器發展越來越多元化,並且在硬體上也有一些的發展及實現,而硬體AI加速器的優勢在於對特定資料格式做運算可以大幅提升速度,僅需使用資料流的方式就可以實現。本論文針對柏克萊大學提出的硬體開源框架Chipyard,提出一個硬體建構的流程,將RISC-V為基礎的CPU搭配AI硬體加速器整合於FPGA平台,並且完善RISC-V軟體開機流程,讓我們可以通過硬體建構流程調整所需的硬體資源,做出客製化的硬體電路,快速的去對CPU及AI硬體加速器於FPGA開發板上做有效的效能評估。
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