黃文吉Wen-Jyi Hwang楊正存Cheng-Tsun Yang2019-09-052011-7-132019-09-052009http://etds.lib.ntnu.edu.tw/cgi-bin/gs32/gsweb.cgi?o=dstdcdr&s=id=%22GN0696470083%22.&%22.id.&http://rportal.lib.ntnu.edu.tw:80/handle/20.500.12235/106707本論文提出一個具平行計算能力的Fuzzy c-means(FCM)演算法硬體架構，並且使用查表法(lookup table)為基礎的除法器，來減少分群處理及計算質量中心點的硬體資源複雜度和計算複雜度。此外，本硬體架構不需儲存權重矩陣(membership coefficients matrix)，而是將權重值(membership coefficinets)的計算結果直接送入質量中心點的更新計算，達到減少記憶體資源消耗的目的。最後本論文所提出的硬體架構會在以FPGA為基礎的可程式化系統晶片設計(System On a Programmable Chip，SOPC)之平台上作實際的效能測試，由實驗的結果可知，本架構具備較低的計算複雜度與更高的效能。A cost-effective parallel VLSI architecture for fuzzy c-means clustering is presented. The architecture reduces the area cost and computational complexity for membership coefficients and centroid computation by employing lookup table based dividers. The usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. Experimental results show that the proposed solution is an effective alternative for cluster analysis with low computational cost and high performance.可重組計算資料分群模糊理論現場可程式化閘陣列可程式單晶片系統reconfigurable computingdata clusteringfuzzy systemFPGAsystem on programmable chip