國立臺灣師範大學應用電子科技學系Yen-Hung KuoJeng-Han TsaiWei-Hung ChouTian-Wei Huang2014-10-302014-10-302010-12-10http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32264A K-band low-noise amplifier with built-in linearizer using 0.18-μm CMOS technology is presented in this paper. To achieve good linearity at high frequency, a distributed derivative superposition linearization technique is used. The measured results show that the improvement of IIP3 and IM3 are 5.3 dB and 10.6 dB at 24 GHz, respectively. The proposed LNA has a noise figure of 3.8 dB and a peak gain of 13.7 dB while consuming 18 mW dc power. To the best of our knowledge, this is the first LNA with a built-in linearizer above 20 GHz in CMOS.CMOSK-bandlinearizerlow noise amplifier (LNA)A 24-GHz 3.8-dB NF Low-Noise Amplifier with Built-In Linearizer