國立臺灣師範大學應用電子科技學系Jeng-Han TsaiYu-Hang Wong2014-10-302014-10-302011-06-010895-2477http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32241A 53–67 GHz wide locking range injection-locked frequency divider (ILFD) has been designed and fabricated using 0.13-μm CMOS process.By using forward body bias technique, the proposed ILFD demonstrates good performance of the wide locking range while maintaining low DC power consumption. Via a 0 dBm incident signal power, an input locking rage greater than 14 GHz (>23%) is achieved with 4 mW from supply voltage of 0.8 V. If the supply voltage further reduces to 0.6 V, the input locking rage is 6 GHz (10%) while consuming only 1.2 mW. Compared to previous reported works in high-speed CMOS FD, the presented ILFD achieves superior figure of merit (FOM). Without extra voltage control mechanisms to increase the locking range, this FD covers whole 57–64 GHz band is suitable for integration into a 60 GHz WPAN phase-locked loop systemCMOSinjection-locked frequency dividermillimeter wavebody biaswide locking range60 GHzWPANA 53-to-67 GHz low-power and wide-locking-range injection locked frequency divider with forward body bias