國立臺灣師範大學電機工程學系Shih-An LiChen-Chien HsuChing-Chang WongChia-Jun Yu2014-10-302014-10-302010-10-13http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32157This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating velocity and position of particles and a fitness evaluation module implemented on a soft-cored processor for evaluating the objective functions are respectively designed and work closely together to accelerate the evolution process. Thanks to a flexible design, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To compensate the deficiency in generating truly random numbers by hardware implementation, a particle re-initialization scheme is also presented in this paper to further improve the execution performance of the PSO. Experiment results have demonstrated that the proposed HW/SW co-design approach to realize PSO is capable of achieving a high-quality solution effectively.HW/SW Co-designParticle swarm optimization (PSO)system on a programmable chip (SOPC)Field Programmable Gate Array (FPGA)