黃啟祐Huang, Chi-Yo郭盈廷Kuo, Ying-Ting2022-06-089999-12-312022-06-082021https://etds.lib.ntnu.edu.tw/thesis/detail/25686c34734fecd2c7b99cde9cd49a96/http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/117912近年來，全球主要半導體廠極力研發次世代技術，以求突破製程微縮之極限，並進而強化核心競爭力。閘極全環場效電晶體 (Gate-All-Around Field-Effect Transistor, GAAFET)為新型半導體元件，除了能改善傳統元件低效能與高功率之缺陷外，更為延長摩爾定律的重要關鍵。由於閘極全環場效電晶體主要應用於邏輯製程，對晶圓代工之領導廠商而言，佈局次世代奈米製程閘極全環場效電晶體之專利，亟為重要。惟業界與學界少有閘極全環場效電晶體相關之專利分析。因此，本研究擬訂定一分析架構，探勘並佈局專利。首先，本研究定義所欲探勘之專利關鍵字，並檢索美國專利商標局 (United States Patent and Trademark Office, USPTO)之專利資料庫，其次，運用主路徑分析法 (Main Path Analysis, MPA)找出閘極全環場效電晶體的關鍵主要路徑軌跡，再藉由決策實驗室分析法 (Decision Making Trial and Evaluation Laboratory，DEMATEL) 及實驗室決策網路流程分析法 (DEMATEL based Analytic Network Process，DANP)探討專利之間的影響關係和權重。最後，以模糊背包問題(Fuzzy Knapsack Problem, FKP)演算法計算權重，選取最重要之技術，再透過模糊能力集合擴展法 (Fuzzy Competence Set Expansion)，訂定技術路徑圖。依據實證研究之結果，本研究求得最佳的專利組合共包括12 項專利技術，不僅作為瞭解新世代半導體元件發展脈絡之基礎之外，也可作為後進廠商佈局專利之依據。此外，所發展之技術探勘架構，也可用於探索其他領域技術與佈局專利之用。In recent years, leading semiconductor wafer foundries around the world have been dedicated to developing next-generation technologies in order to overcome constraints of device shrinkage and strengthen the firm's core competitiveness. GAAFET (Gate-All-Around Field-Effect Transistor) is a novel semiconductor device that is crucial for extending Moore's Law by solving the low-efficiency and high-power consumption restrictions of existing semiconductor devices. Because GAAFETs will mainly be utilized in logic processes, establish a technology portfolio for GAAFET techniques to be used in the next-generation process is very critical for leading semiconductor foundries. However, there are very limited patents analyses related to GAAFET by either industry experts or scholars.Therefore, this research aims to construct and formulate an analytic framework to explore and design around the existing patents. Firstly, this research defines the patent keywords to be explored and searches the patent database from the United States Patent and Trademark Office (USPTO). Secondly, the research uses the main path analysis (MPA) method to derive the main path of patents of the GAAFET. Then, the Decision-Making Trial and Evaluation Laboratory (DEMATEL) and the DEMATEL based Analytic Network Process (DANP) are used to explores the influence relationship and the weights between patents. Last but not least, this study uses an algorithm for solving the fuzzy knapsack problem (FKP) to define fuzzy weights and select the most important GAAFET technology. Then, the fuzzy competence set expansion method can be adapted to define a minimum spanning tree. The minimum spanning tree can be used to formulate a technology roadmap based on experts’ opinions.According to the results of the empirical research, the best patent portfolio obtained from this research consists of 12 patented technologies. These patents are able to serve as a basis for defining a technology roadmap. Furthermore, these patents will form a technology portfolio for late-coming manufacturers to construct a technology portfolio by designing around existing patents. The technology mining framework established in this study can also be utilized to investigate technology and design around patents in other fields.半導體奈米製程專利探勘主路徑分析閘極全環場效電晶體決策實驗室分析法決策實驗室網路流程法模糊背包問題模糊能力集合擴展SemiconductorNano-fabricationPatent MiningMain Path Analysis (MPA)Gate-All-Around FET (GAAFET)Decision-Making Trial and Evaluation Laboratory (DEMATEL)DEMATEL based Analytic Network Process (DANP)Fuzzy Knapsack Problem (FKP)Fuzzy Competence Set Expansion學術論文