氧化釔摻鋯堆疊閘極介電層之特性以及漏電機制研究分析

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dc.contributor劉傳璽zh_TW
dc.contributor屠名正zh_TW
dc.contributor.author柯智馨zh_TW
dc.contributor.authorKo, Chih-Hsinen_US
dc.date.accessioned2019-09-03T12:11:06Z
dc.date.available2014-8-25
dc.date.available2019-09-03T12:11:06Z
dc.date.issued2014
dc.description.abstract氧化釔為一個高介電係數(~12-18)材料、寬的能隙(5.5 eV)、熱穩定度高， 且與矽的相容度很高，但氧化釔容易與矽產生擴散形成界面層造成介電係數 的下降。另一方面，由於氧化鋯結晶溫度較低，在高溫製程後會容易有結晶 的現象，造成更大的漏電流產生。選擇氧化釔做為基礎，而後摻雜鋯至氧化 釔中形成介電層，接著覆蓋一層氮化鋯做為一層阻擋層，希望能減少擴散的 產生。最後鍍上一層鈦金屬，在不同溫度的快速熱退火之後，量測該電容器 的電性與物性。 本研究主要是利用共濺鍍的方式將鋯摻雜於氧化釔層，並且進行550 oC、 700 oC 和850 oC 的快速熱退火， 接著將鋁電極沉積上去就會形成 Al/Ti/ZrN/Y2O3+Zr/ Y2O3/p-Si 和Al/Ti/Y2O3+Zr/Y2O3/p-Si 兩種結構。實驗結果顯示摻雜鋯後，會使高介電係數介電層在高溫製程後會有結晶的現象產生，導致薄膜表面較粗糙；覆蓋一層氮化鋯，可以減少擴散現象的發生，但如果 氮化鋯的厚度不足，還是會有擴散產生。另外，電性方面，本實驗有量測許 多薄膜的電性數據包括在不同的量測溫度下所得到的漏電流值、由C-V 所 得之介電係數、平帶電壓的偏移量、薄膜的漏電流傳導機制等。zh_TW
dc.description.abstractY2O3 is a promising high-k (~12-18) material with wide band gap (5.5 eV), stable thermal stability, and low lattice mismatch between Y2O3 and Si. However, it is easy to form the interfacial layer because of the inter-diffusion between Y2O3 and Si, which lowers the dielectric constant. On the other hand, ZrO2 has also been reported that it starts to crystallize after high temperature process due to the low crystallization temperature and hence causes larger leakage current. The dielectric layer is formed by doping Zr into Y2O3, and ZrN is subsequently deposited to the dielectric layer to suppress the inter-diffusion. Finally, metal Ti is deposited to form the gate. Measurement of electrical characteristics and physical properties have been studied for the samples after rapid thermal annealing at different temperatures. In this study, zirconium (Zr) was doped into the Y2O3 layer through co-sputtering before rapid thermal annealing (RTA) at 550 oC, 700 oC, and 850oC and Al electrode formation. Two structures were formed: Al/Ti/ZrN/Y2O3+Zr/Y2O3/p-Si and Al/Ti/Y2O3+Zr/Y2O3/p-Si. The experimental results show that the Zr-incorporated Y2O3 thin film crystallizes and results in a rougher surface after a high temperature process. Moreover, the ZrN layer can suppress inter-diffusion; however, the inter-diffusion still occurs if the ZrN layer is not thick enough. On the other hand, the electrical properties of two structures were also analyzed and compared, including leakage current measured at 300-450 K, dielectric constant, flat-band voltage shift, current conduction behavior, and leakage current mechanism.en_US
dc.description.sponsorship機電工程學系zh_TW
dc.identifierGN060173024H
dc.identifier.urihttp://etds.lib.ntnu.edu.tw/cgi-bin/gs32/gsweb.cgi?o=dstdcdr&s=id=%22GN060173024H%22.&%22.id.&
dc.identifier.urihttp://rportal.lib.ntnu.edu.tw:80/handle/20.500.12235/97128
dc.language中文
dc.subject電晶體zh_TW
dc.subject高介電係數zh_TW
dc.subject氧化釔zh_TW
dc.subject氮化鋯zh_TW
dc.subjectMOSFETen_US
dc.subjecthigh-ken_US
dc.subjectY2O3en_US
dc.subjectZrNen_US
dc.title氧化釔摻鋯堆疊閘極介電層之特性以及漏電機制研究分析zh_TW
dc.titleThe characteristics and leakage current mechanism analysis of MOS structure with Zr incorporated Y2O3 stack high-k dielectric layeren_US

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