A 1V 82dB Multibit Delta-Sigma Modulator
| dc.contributor | 國立臺灣師範大學電機工程學系 | zh_tw |
| dc.contributor.author | Chien-Hung Kuo | en_US |
| dc.contributor.author | Kang-Shuo Chang | en_US |
| dc.contributor.author | Jing-Shan Jian | en_US |
| dc.date.accessioned | 2014-10-30T09:28:40Z | |
| dc.date.available | 2014-10-30T09:28:40Z | |
| dc.date.issued | 2006-08-11 | zh_TW |
| dc.description.abstract | This paper proposes a double-sampling multibit delta sigma modulator with a single switched-opamp at a 1V of supply voltage. Two new digital-to-analog converter feedbacks for the low voltage modulator are developed to overcome the driving problem of the switches and minimize the number of capacitors used in the feedbacks of the modulator. The proposed modulator has been implemented with a second-order 3-bit modulator in a 0.18.mu.m 1P6M CMOS process. The measured signal-to-noise ratio and dynamic range of the modulator in a 24kHz of bandwidth are 80dB and 82dB, respectively, under a 2.5MHz of clock rate. The power consumption of the modulator is 1.8mW at 1V of supply voltage. | en_US |
| dc.identifier | ntnulib_tp_E0610_02_001 | zh_TW |
| dc.identifier.uri | http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32210 | |
| dc.language | en | zh_TW |
| dc.relation | The 17th VLSI Design/CAD Symposium, Hualien. | en_US |
| dc.title | A 1V 82dB Multibit Delta-Sigma Modulator | en_US |