A 60-GHz CMOS power amplifier with built-in pre-distortion linearizer
dc.contributor | 國立臺灣師範大學應用電子科技學系 | zh_tw |
dc.contributor.author | Jeng-Han Tsai | en_US |
dc.contributor.author | Chung-Han Wu | en_US |
dc.contributor.author | Hong-Yuan Yang | en_US |
dc.contributor.author | Tian-Wei Huang | en_US |
dc.date.accessioned | 2014-10-30T09:28:43Z | |
dc.date.available | 2014-10-30T09:28:43Z | |
dc.date.issued | 2011-12-01 | zh_TW |
dc.description.abstract | A built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power ampli- fier (PA) achieves a of 10.72 dBm and of 7.3 dBm from 1.2 V supply. After linearization, the has been doubled from 7.3 to 10.2 dBm and the operating PAE at consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB. | en_US |
dc.description.uri | http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06070991 | zh_TW |
dc.identifier | ntnulib_tp_E0611_01_003 | zh_TW |
dc.identifier.issn | 1531-1309 | zh_TW |
dc.identifier.uri | http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32239 | |
dc.language | en | zh_TW |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation | IEEE Microwave and Wireless Components Letters, 21(12), 676-678.� | en_US |
dc.subject.other | CMOS | en_US |
dc.subject.other | linearization | en_US |
dc.subject.other | linearizer | en_US |
dc.subject.other | power amplifier (PA) | en_US |
dc.subject.other | pre-distortion | en_US |
dc.subject.other | 60 GHz. | en_US |
dc.title | A 60-GHz CMOS power amplifier with built-in pre-distortion linearizer | en_US |