A 60-GHz CMOS power amplifier with built-in pre-distortion linearizer

dc.contributor國立臺灣師範大學應用電子科技學系zh_tw
dc.contributor.authorJeng-Han Tsaien_US
dc.contributor.authorChung-Han Wuen_US
dc.contributor.authorHong-Yuan Yangen_US
dc.contributor.authorTian-Wei Huangen_US
dc.date.accessioned2014-10-30T09:28:43Z
dc.date.available2014-10-30T09:28:43Z
dc.date.issued2011-12-01zh_TW
dc.description.abstractA built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power ampli- fier (PA) achieves a of 10.72 dBm and of 7.3 dBm from 1.2 V supply. After linearization, the has been doubled from 7.3 to 10.2 dBm and the operating PAE at consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB.en_US
dc.description.urihttp://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06070991zh_TW
dc.identifierntnulib_tp_E0611_01_003zh_TW
dc.identifier.issn1531-1309zh_TW
dc.identifier.urihttp://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32239
dc.languageenzh_TW
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relationIEEE Microwave and Wireless Components Letters, 21(12), 676-678.�en_US
dc.subject.otherCMOSen_US
dc.subject.otherlinearizationen_US
dc.subject.otherlinearizeren_US
dc.subject.otherpower amplifier (PA)en_US
dc.subject.otherpre-distortionen_US
dc.subject.other60 GHz.en_US
dc.titleA 60-GHz CMOS power amplifier with built-in pre-distortion linearizeren_US

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