Optimization of Pattern Matching Circuits for Network Intrusion Detection System
| dc.contributor | 國立臺灣師範大學科技應用與人力資源發展學系 | zh_tw |
| dc.contributor.author | Cheng-Hung Lin | en_US |
| dc.contributor.author | Chih-Tsun Huang | en_US |
| dc.contributor.author | Chang-Ping Jiang | en_US |
| dc.contributor.author | Shih Chieh Chang | en_US |
| dc.date.accessioned | 2014-10-30T09:35:09Z | |
| dc.date.available | 2014-10-30T09:35:09Z | |
| dc.date.issued | 2006-08-01 | zh_TW |
| dc.identifier | ntnulib_tp_E0213_02_006 | zh_TW |
| dc.identifier.uri | http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/36380 | |
| dc.language | en | zh_TW |
| dc.relation | Proc. of 17th VLSI Design/CAD Symposium, Hualien, Taiwan. | en_US |
| dc.title | Optimization of Pattern Matching Circuits for Network Intrusion Detection System | en_US |