Biased Random Vector Generator based on Circuit Structure

dc.contributor國立臺灣師範大學科技應用與人力資源發展學系zh_tw
dc.contributor.authorYu-Min Kuoen_US
dc.contributor.authorheng-Hung Linen_US
dc.contributor.authorChun-Yao Wangen_US
dc.contributor.authorShih-Chieh Changen_US
dc.contributor.authorPei-Hsin Hoen_US
dc.date.accessioned2014-10-30T09:35:09Z
dc.date.available2014-10-30T09:35:09Z
dc.date.issued2005-08-01zh_TW
dc.identifierntnulib_tp_E0213_02_004zh_TW
dc.identifier.urihttp://rportal.lib.ntnu.edu.tw/handle/20.500.12235/36378
dc.languageenzh_TW
dc.relationProc. of 16st� VLSI Design/CAD Symposium, Hualien, Taiwan.en_US
dc.titleBiased Random Vector Generator based on Circuit Structureen_US

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