24 GHz CMOS 收發器線性化技術

Abstract

本計畫將開發應用於下一代寬頻高速的無線通信系統的24GHz 高線性度收發器積 體電路，實現的方法將使用互補式金氧半導體之積體電路技術。計畫目標是研究利用矽 基製程技術，開發24GHz 收發器積體電路，包括功率放大器、低雜訊放大器、與混頻 器等。並且爲了滿足現今高速無線數位通信系統嚴格的線性度要求，本計畫針對發射器 中的關鍵元件，作線性度的分析，並且發展線性化技術，達到在有限的電能消耗下，設 計一24GHz CMOS 高線性度收發器的目標。

This project proposes the research and development of the 24GHz high linearity transceiver integrated circuit using Si-based process technology for next generation broadband and high-speed wireless communication system applications. The major target of this project is to develop the Si-based 24GHz transceiver integrated circuit include power amplifier, low noise amplifier, and mixer. Moreover, to satisfy the stringent linearity requirements of the modern high-speed wireless digital communication system, the linearity analysis and linearization techniques are proposed for the 24GHz transceiver integrated circuit in the project. After linearization, the 24GHz CMOS high linearity transceiver would be achieved.