CMOS oversampling ΔΣ magnetic-to-digital converters
| dc.contributor | 國立臺灣師範大學電機工程學系 | zh_tw |
| dc.contributor.author | Chien-Hung Kuo | en_US |
| dc.contributor.author | Shr-Lung Chen | en_US |
| dc.contributor.author | Lee-An Ho | en_US |
| dc.contributor.author | Shen-Iuan Liu | en_US |
| dc.date.accessioned | 2014-10-30T09:28:40Z | |
| dc.date.available | 2014-10-30T09:28:40Z | |
| dc.date.issued | 2001-10-01 | zh_TW |
| dc.description.abstract | In this paper, two CMOS oversampling delta-sigma (ΔΣ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) ΔΣ modulator. The second one directly uses the MOP to realize a first-order SC ΔΣ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively | en_US |
| dc.description.uri | http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=953488 | zh_TW |
| dc.identifier | ntnulib_tp_E0610_01_009 | zh_TW |
| dc.identifier.issn | 0018-9200� | zh_TW |
| dc.identifier.uri | http://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32208 | |
| dc.language | en | zh_TW |
| dc.publisher | IEEE Solid-State Circuits Society | en_US |
| dc.relation | IEEE Journal of Solid-State Circuits, 36(10), 1582-1586. | en_US |
| dc.subject.other | CMOS | en_US |
| dc.subject.other | delta–sigma modulator | en_US |
| dc.subject.other | magnetic sensor | en_US |
| dc.title | CMOS oversampling ΔΣ magnetic-to-digital converters | en_US |