Please use this identifier to cite or link to this item: http://rportal.lib.ntnu.edu.tw:80/handle/77345300/32239
Title: A 60-GHz CMOS power amplifier with built-in pre-distortion linearizer
Authors: 國立臺灣師範大學應用電子科技學系
Jeng-Han Tsai
Chung-Han Wu
Hong-Yuan Yang
Tian-Wei Huang
Issue Date: 1-Dec-2011
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Abstract: A built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power ampli- fier (PA) achieves a of 10.72 dBm and of 7.3 dBm from 1.2 V supply. After linearization, the has been doubled from 7.3 to 10.2 dBm and the operating PAE at consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB.
URI: http://rportal.lib.ntnu.edu.tw/handle/77345300/32239
ISSN: 1531-1309
Other Identifiers: ntnulib_tp_E0611_01_003
Appears in Collections:教師著作

Files in This Item:
There are no files associated with this item.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.