Please use this identifier to cite or link to this item: http://rportal.lib.ntnu.edu.tw:80/handle/77345300/32119
Title: Hardware/Software Co-design for Particle Swarm Optimization Algorithm
Authors: 國立臺灣師範大學電機工程學系
Shih-An Li
Chen-Chien Hsu
Ching-Chang Wong
Chia-Jun Yu
Issue Date: 15-Oct-2011
Publisher: Elsevier
Abstract: This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve design flexibility and execution performance of particle swarm optimization (PSO) for embedded applications. Based on modular design architecture, a Particle Updating Accelerator module via hardware implementation for updating velocity and position of particles and a Fitness Evaluation module implemented either on a soft-cored processor or Field Programmable Gate Array (FPGA) for evaluating the objective functions are respectively designed to work closely together to carry out the evolution process at different design stages. Thanks to the design flexibility, the proposed approach can tackle various optimization problems of embedded applications without the need for hardware redesign. To further improve the execution performance of the PSO, a hardware random number generator (RNG) is also designed in this paper in addition to a particle re-initialization scheme to promote exploration search during the optimization process. Experimental results have demonstrated that the proposed HW/SW co-design approach for PSO algorithms has good efficiency for obtaining high-quality solutions for embedded applications.
URI: http://rportal.lib.ntnu.edu.tw/handle/77345300/32119
ISSN: 0020-0255
Other Identifiers: ntnulib_tp_E0607_01_025
Appears in Collections:教師著作

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