Fabrication of nanoporous antireflection surfaces on silicon

Date
2008-11-01
Authors
Huang, Mao-Jung
Yang, Chii-Rong
Chiou, Yuang-Cherng
Lee, Rong-Tsong
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Elsevier
Abstract
After the surface of a silicon wafer has been texturized, the reflectance of the wafer surface can be reduced to increase the power generation efficiency of a silicon-based solar cell. This study presents the integration of self-assembled nanosphere lithography (SANSL) and photo-assisted electrochemical etching (PAECE) to fabricate a nanostructure array with a high aspect ratio on the surface of silicon wafer, to reduce its reflectance. The experimental results show that the etching depth of the fabricated nanopore array structure is about View the MathML source and its diameter is about 90 nm, such that the aspect ratio of the pore can reach about 68:1. The weighted mean reflectance of a blank silicon wafer is 40.2% in the wavelength range of 280–890 nm. Five-minute PAECE without SANSL reduces the weighted mean reflectance to 5.16%. Five-minute PAECE with SANSL reduces the weighted mean reflectance to 1.73%. Further coating of a 200 Å thick silicon nitride layer on the surface of a nanostructure array reduces the weighted mean reflectance even to 0.878%. The novel fabrication technology proposed in this study has the advantage of being low cost, and the fabricated nanostructure array can be employed as an antireflection structure in single crystalline silicon solar cells.
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