Please use this identifier to cite or link to this item: http://rportal.lib.ntnu.edu.tw:80/handle/20.500.12235/32211
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dc.contributor國立臺灣師範大學電機工程學系zh_tw
dc.contributor.authorChien-Hung Kuoen_US
dc.contributor.authorShuo-Chau Chenen_US
dc.contributor.authorKang-Shuo Changen_US
dc.date.accessioned2014-10-30T09:28:40Z-
dc.date.available2014-10-30T09:28:40Z-
dc.date.issued2006-11-01zh_TW
dc.identifierntnulib_tp_E0610_02_002zh_TW
dc.identifier.urihttp://rportal.lib.ntnu.edu.tw/handle/20.500.12235/32211-
dc.description.abstractIn this paper, a low-voltage switched-opamp-based 2-2 cascaded switehed-capacitor delta-sigma modulator in a 0.18-μm 1P6M CMOS technology is presented. The fourth-order modulator is realized using a low-distortion feed-forward topology to promote its linearity and dynamic range. The presented modulator can be operated in a wide range of supply voltage from 1.8V to 0.9V. The switched-opamp with double output stage is utilized to combine with the double-sampling technique so that the effective clocking rate can be reduced, thus also relaxing the requirement of opamp. The modulator achieves a 91 dB of SNDR within 24 kHz signal bandwidth under a 2 MHz of clocking rate. The total power consumption of this modulator is 0.86 mW under a 1V supply voltage and the chip core area is 1.57mm2.en_US
dc.languageenzh_TW
dc.relationThe 4th IASTED International Conference on Circuits, Signals and Systems, San Francisco, pp. 199-204.en_US
dc.titleA 91dB SOP-Based Low-Voltage Low-Distortion Fourth-Order 2-2 Cascaded Delta-Sigma Modulatoren_US
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