教師著作
Permanent URI for this collectionhttp://rportal.lib.ntnu.edu.tw/handle/20.500.12235/31268
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Item 24 GHz CMOS 收發器線性化技術(行政院國家科學委員會, 2009-07-31) 蔡政翰本計畫將開發應用於下一代寬頻高速的無線通信系統的24GHz 高線性度收發器積 體電路，實現的方法將使用互補式金氧半導體之積體電路技術。計畫目標是研究利用矽 基製程技術，開發24GHz 收發器積體電路，包括功率放大器、低雜訊放大器、與混頻 器等。並且爲了滿足現今高速無線數位通信系統嚴格的線性度要求，本計畫針對發射器 中的關鍵元件，作線性度的分析，並且發展線性化技術，達到在有限的電能消耗下，設 計一24GHz CMOS 高線性度收發器的目標。Item A high-efficiency, broadband and high output power PHEMT balanced K-band doubler with integrated balun(2006-12-15) Wen-Ren Lee,Shih-Fong Chao; Zuo-Min Tsai,Pin-Cheng Huang; Chun-Hsien Lien; Jeng-Han Tsai; Huei WangA high-efficiency and high output power K-band frequency doubler using InGaAs PHEMT power device is developed, which features high fundamental frequency rejection, high efficiency, good conversion gain over wide bandwidth, and high output power. A compact lumped rat-race hybrid and an output buffer amplifier are implemented on chip for a balanced design and high output power. The circuit exhibits measured conversions gain about 8 dB over the output frequencies from 12 to 22 GHz. The fundamental frequency suppression is better than 20 dB and the second harmonic saturation output power is higher than 12 dBm with a miniature chip size of 2 mm x 1 mm.Item A high-efficiency, broadband and high output power pHEMT balanced K-band doubler with integrated balun(2006-12-15) Wen-Ren Lee; Shih-Fong Chao; Zuo-Min Tsai; Pin-Cheng Huang; Chun-Hsien Lien; Jeng-Han Tsai; Huei WangA high-efficiency and high output power K-band frequency doubler using InGaAs PHEMT power device is developed, which features high fundamental frequency rejection, high efficiency, good conversion gain over wide bandwidth, and high output power. A compact lumped rat-race hybrid and an output buffer amplifier are implemented on chip for a balanced design and high output power. The circuit exhibits measured conversions gain about 8 dB over the output frequencies from 12 to 22 GHz. The fundamental frequency suppression is better than 20 dB and the second harmonic saturation output power is higher than 12 dBm with a miniature chip size of 2 mm x 1 mm.Item A Q-band miniature monolithic subharmonically pumped resistive mixer(2006-12-01) Shih-Yu Chen; Jeng-Han Tsai; Pei-Si Wu; Tian-Wei Huang; Huei WangThis paper proposes a miniature Q-band monolithic subharmonically pumped resistivemixer, consisting of two pHEMT transistors, a LOreduced-size Marchand balun and RF/IF filters. Thecompact RF/IF diplex circuit and a reduced-sizebalun were used to minimize the chip size whichresults only 0.72 mm 2 . Besides, 5 dBm LO inputpower is needed which is one-third of othersubharmonically pumped mixers with more than 10dBm LO power. This mixer exhibits 12.5 � 1.5 dBup-conversion loss and 12 � 1 dB down-conversionloss with 5 dBm LO input power. Up-conversion 1-dB compression output power is -15dBm and down-conversion 1-dB compression output power is -12dBm. To our knowledge, this mixer has goodconversion with smallest chip size and minimum LOinput power.Item A 68-83-GHz power amplifier in 90 nm standard CMOS(2009-06-12) Jeffrey Lee; Chung-Chun Chen; Jeng-Han Tsai; Kun-You Lin; Huei WangA balanced PA covering 68-83 GHz is developed in 90 nm CMOS. Using wideband power matching topology, the PA achieves power gain of greater than 18.1 dB from 68 to 83 GHz and gain flatness within 0.2 dB from 68 to 78 GHz. The PA has a maximum saturation output power of 14 dBm at 70 GHz, and greater than 11.8 dBm from 68 to 83 GHz. The best P1dB is 12 dBm at 68 GHz, and greater than 8.3 dBm from 68 to 83 GHz.