教師著作

Search Results

Now showing 1 - 2 of 2

A V-band VCO using fT-doubling technique in 0.18-μm CMOS
(2011-12-08) Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang; Huei Wang
A low supply voltage V-band voltage-controlled oscillator (VCO) using fT-doubling technique is presented in this paper. The proposed VCO is fabricated in 0.18-μm CMOS technology. The proposed VCO adopts the fT-doubling technique to eliminate the gate-to-source capacitance of cross-coupled pair of VCO. The oscillation frequency of VCO can be increased due to the parasitic capacitance is eliminated. The measured results show that the proposed VCO have tuning range of 0.74 GHz from 58.09-to-58.83 GHz. The proposed VCO consumes 4 mW dc power from 1.2 V supply voltage.
An ultra low-power 24 GHz phase-lock-loop with low phase-noise VCO embedded in 0.18-μm CMOS process
(2011-12-08) Yu-Hsuan Lin; Jeng-Han Tsai; Yen-Hung Kuo; Tian-Wei Huang
A 24 GHz 29.8 mW Phase-lock-loop using 0.18 μm CMOS technology is presented in this paper. To achieve the low-power issue and low phase-noise performance, a transformer feedback voltage control oscillator and a cascoded divider of injection-locked frequency divider and current mode logic divider for low voltage and low power are implemented. The phase-lock-loop phase noise was measured by -122 dBc/Hz at 10 MHz offset with low supply voltage and equipped the locking range of 20.80-23.37 GHz. The PLL dissipate 29.8 mW (only 13.3 mW in VCO + ILFD) and occupies the total area of 0.39 mm2 without off-chip loop filter.